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support M5Stack Tab5

HeronimonimoSuggested this wish ·

Board or product name and model

M5Stack Tab5

Link to the product listing or datasheet

shop.m5stack.comhttps://shop.m5stack.com/products/m5stack-tab5-iot-development-kit-esp32-p4

Display controller and resolution, if known

No response

Touch controller, if known

No response

Do you own this board and can test it?

Yes, I have it and can test

Anything else

I just bought a M5Stack Tab5 as alternative for the Guition displays as it is sold with an optional kit with battery and has a high resolution display.

Originally shared on GitHubOriginal authors and dates are preserved.

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Discussion 8

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MaxGramser

Thanks for the request, and great that you can test it.

Good news first: ESPHome itself supports everything on the Tab5 (the display, the touch panel, the IO expanders and the ESP32-C6 for Wi-Fi), so this should be a clean board to add.

The catch is that the Tab5 ships with three different display and touch combinations, and the firmware has to be built for exactly one of them. A build for the wrong one leaves the screen black. So before building anything, I'd like to know exactly which one you have, rather than guess.

M5Stack's own factory firmware checks this at every start and writes it to its USB log. If the factory firmware is still on your Tab5:

  1. Connect the Tab5 to a computer with a USB-C data cable.
  2. Open https://espressif.github.io/esptool-js/ in Chrome or Edge, go to the Console section, set the baud rate to 115200 and click Start, then pick the Tab5's port.
  3. Click Reset (or press the Tab5's reset button) so it starts up while the console is open.
  4. Copy the first lines of the log and paste them here. The lines I'm after look like ESP-ROM:esp32p4-..., chip revision: v... and Detected ... touch controller.

This only reads the log, it doesn't change anything on the device.

If you have already flashed something else onto it, the first lines (the chip revision) are still useful. In that case a photo of the label on the back and of the box, plus roughly when you bought it, would help too.

Once I know the version, I'll add a build for exactly that one and ask you to try it.


Got a screen running? Tell others which board you have and what works on the Tessera website. It helps everyone pick a screen that works.

Like my work? Consider buying me a coffee, much appreciated!

Original on GitHub

Heronimonimo

Great, I'll check when the board arrives.

Would this firmware also expose the battery charge level and other sensors to Home Assistant?

Original on GitHub

MaxGramser

@Heronimonimo not yet... let's get the base running first haha!

Original on GitHub

Heronimonimo

Just received the board and captured the logs. This is what I got on boot:

[08:53:32]ESP-ROM:esp32p4-eco2-20240710
[08:53:32]Build:Jul 10 2024
[08:53:32]rst:0x17 (CHIP_USB_UART_RESET),boot:0x20c (SPI_FAST_FLASH_BOOT)
[08:53:32]Core0 Saved PC:0x4ff160bc
[08:53:32]Core1 Saved PC:0x4ff160bc
[08:53:32]SPI mode:DIO, clock div:1
[08:53:32]load:0x4ff33ce0,len:0x1744
[08:53:32]load:0x4ff2abd0,len:0xea8
[08:53:32]load:0x4ff2cbd0,len:0x341c
[08:53:32]entry 0x4ff2abda
[08:53:32]I (8) boot: ESP-IDF v5.4.2 2nd stage bootloader
[08:53:32]I (8) boot: compile time Jun  2 2026 15:20:02
[08:53:32]I (9) boot: Multicore bootloader
[08:53:32]I (10) boot: chip revision: v1.3
[08:53:32]I (10) boot: efuse block revision: v0.3
[08:53:32]I (10) qio_mode: Enabling default flash chip QIO
[08:53:32]I (11) boot.esp32p4: SPI Speed      : 80MHz
[08:53:32]I (11) boot.esp32p4: SPI Mode       : QIO
[08:53:32]I (11) boot.esp32p4: SPI Flash Size : 16MB
[08:53:32]I (12) boot: Enabling RNG early entropy source...
[08:53:32]I (12) boot: Partition Table:
[08:53:32]I (12) boot: ## Label            Usage          Type ST Offset   Length
[08:53:32]I (13) boot:  0 nvs              WiFi data        01 02 00009000 00006000
[08:53:32]I (13) boot:  1 phy_init         RF data          01 01 0000f000 00001000
[08:53:32]I (14) boot:  2 factory          factory app      00 00 00010000 00a00000
[08:53:32]I (15) boot:  3 human_face_det   Unknown data     01 82 00a10000 00064000
[08:53:32]I (15) boot:  4 storage          Unknown data     01 82 00a74000 00200000
[08:53:32]I (16) boot: End of partition table
[08:53:32]I (17) esp_image: segment 0: paddr=00010020 vaddr=48160020 size=3f711ch (4157724) map
[08:53:32]I (530) esp_image: segment 1: paddr=00407144 vaddr=30100000 size=00068h (   104) load
[08:53:32]I (532) esp_image: segment 2: paddr=004071b4 vaddr=4ff00000 size=08e64h ( 36452) load
[08:53:32]I (538) esp_image: segment 3: paddr=00410020 vaddr=48000020 size=1589e0h (1411552) map
[08:53:33]I (714) esp_image: segment 4: paddr=00568a08 vaddr=4ff08e64 size=1e540h (124224) load
[08:53:33]I (733) esp_image: segment 5: paddr=00586f50 vaddr=4ff27400 size=02e78h ( 11896) load
[08:53:33]I (736) esp_image: segment 6: paddr=00589dd0 vaddr=4ff40000 size=01834h (  6196) load
[08:53:33]I (738) esp_image: segment 7: paddr=0058b60c vaddr=50108080 size=0001ch (    28) load
[08:53:33]I (747) boot: Loaded app from partition at offset 0x10000
[08:53:33]I (747) boot: Disabling RNG early entropy source...
[08:53:33]I (749) hex_psram: vendor id    : 0x0d (AP)
[08:53:33]I (750) hex_psram: Latency      : 0x01 (Fixed)
[08:53:33]I (750) hex_psram: DriveStr.    : 0x00 (25 Ohm)
[08:53:33]I (750) hex_psram: dev id       : 0x03 (generation 4)
[08:53:33]I (751) hex_psram: density      : 0x07 (256 Mbit)
[08:53:33]I (751) hex_psram: good-die     : 0x06 (Pass)
[08:53:33]I (751) hex_psram: SRF          : 0x02 (Slow Refresh)
[08:53:33]I (752) hex_psram: BurstType    : 0x00 ( Wrap)
[08:53:33]I (752) hex_psram: BurstLen     : 0x03 (2048 Byte)
[08:53:33]I (753) hex_psram: BitMode      : 0x01 (X16 Mode)
[08:53:33]I (753) hex_psram: Readlatency  : 0x04 (14 cycles@Fixed)
[08:53:33]I (753) hex_psram: DriveStrength: 0x00 (1/1)
[08:53:33]I (754) MSPI DQS: tuning success, best phase id is 0
[08:53:33]I (922) MSPI DQS: tuning success, best delayline id is 17
[08:53:33]I esp_psram: Found 32MB PSRAM device
[08:53:33]I esp_psram: Speed: 200MHz
[08:53:33]I (1120) mmu_psram: .rodata xip on psram
[08:53:33]I (1188) mmu_psram: .text xip on psram
[08:53:33]I (1188) hex_psram: psram CS IO is dedicated
[08:53:33]I (1188) cpu_start: Multicore app
[08:53:33]I (1585) esp_psram: SPI SRAM memory test OK
[08:53:33]I (1596) cpu_start: Pro cpu start user code
[08:53:33]I (1596) cpu_start: cpu freq: 360000000 Hz
[08:53:33]I (1596) app_init: Application information:
[08:53:33]I (1596) app_init: Project name:     m5stack_tab5
[08:53:33]I (1596) app_init: App version:      V0.3-1-g4b57c62
[08:53:33]I (1596) app_init: Compile time:     Jun  2 2026 16:47:39
[08:53:33]I (1597) app_init: ELF file SHA256:  741b626b3...
[08:53:33]I (1597) app_init: ESP-IDF:          v5.4.2
[08:53:33]I (1597) efuse_init: Min chip rev:     v0.1
[08:53:33]I (1597) efuse_init: Max chip rev:     v1.99
[08:53:33]I (1597) efuse_init: Chip rev:         v1.3
[08:53:33]I (1598) heap_init: Initializing. RAM available for dynamic allocation:
[08:53:33]I (1598) heap_init: At 4FF2A680 len 00010940 (66 KiB): RAM
[08:53:33]I (1598) heap_init: At 4FF3AFC0 len 00004BF0 (18 KiB): RAM
[08:53:33]I (1599) heap_init: At 4FF45940 len 0003A6C0 (233 KiB): RAM
[08:53:33]I (1599) heap_init: At 5010809C len 00007F64 (31 KiB): RTCRAM
[08:53:33]I (1599) heap_init: At 30100068 len 00001F98 (7 KiB): TCM
[08:53:33]I (1599) esp_psram: Adding pool of 27264K of PSRAM memory to heap allocator
[08:53:33]I (1600) esp_psram: Adding pool of 29K of PSRAM memory gap generated due to end address alignment of irom to the heap allocator
[08:53:33]I (1600) esp_psram: Adding pool of 35K of PSRAM memory gap generated due to end address alignment of drom to the heap allocator
[08:53:33]I (1601) spi_flash: detected chip: generic
[08:53:33]I (1601) spi_flash: flash io: qio
[08:53:33]I (1601) host_init: ESP Hosted : Host chip_ip[18]
[08:53:33]I (1602) H_API: ESP-Hosted starting. Hosted_Tasks: prio:23, stack: 5120 RPC_task_stack: 5120
[08:53:33]sdio_mempool_create free:28077192 min-free:28077192 lfb-def:27787264 lfb-8bit:27787264

Original on GitHub

Heronimonimo

And a bit further down in the logs I found this for the touch controller: [08:53:34]I (2449) M5STACK_TAB5: Detected ST7121 touch controller (FW version: 1), using ST7121 display

Original on GitHub

Heronimonimo

@MaxGramser found this repo that has working configs for all different versions of the Tab5 using ESPHome and LVGL: https://github.com/Axellum/M5-Tab5-ESPHome-LVGL/

Should be fairly easy to get it working using Claude and that repo as a starting point.

Original on GitHub

Heronimonimo

Original on GitHub

MaxGramser

The Tab5 is in app 0.4.64 with firmware 0.39.0 as a new board, from your pull request #150 (release notes). Thanks again for building and testing it.


Got a screen running? Tell others which board you have and what works on the Tessera website. It helps everyone pick a screen that works.

Want me to keep building? Consider supporting monthly or buying me a coffee, much appreciated!

Original on GitHub

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